Programmable Circuits
2015-2016
-
ELE3342
- 10 ECTS
On the basis of
ELE2131 Digitalteknikk og Mikrokontrollere
Expected learning outcomes
Knowledge
- Have broad knowledge of various programmable logic circuits and how these are constructed and functioning.
- Be able to describe how a logical element is built up and working.
- Be able to explain how a digital system can be described using HDL (Hardware Description Language).
- Be able to explain how to describe a digital design in VHDL.
- Know the boundary-scan and principles for testing digital designs.
- Know the aspects of security and vulnerability in FPGA systems.
Skills
- Be able to use VHDL to describe and realize a digital circuit in an FPGA.
- Be able to use Altera programming tools / development system Quartus II.
- Be able to use ModelSim to simulate a digital system.
- Be able to specify and implement a digital design.
General competence
- Be able to plan and carry out a project assignment.
- Be able to apply computational tools.
Topic(s)
- Programmable logic circuits
- FPGA families
- Structure of digital systems
- Description of HW in VHDL
- Verification of digital design
- Altera Quartus II development system
- Programming of FPGA circuits
- Testing - Boundary Scan
- Security and vulnerability in FPGA system
Teaching Methods
Lectures
Exercises
Project work
Form(s) of Assessment
Written exam, 4 hours
Evaluation of Project(s)
Form(s) of Assessment (additional text)
- Written Exam, 4 hours, counts 55%.
- Assessment of project and compulsory exercise, counts 45%.
- Each part must be passed separately.
Grading Scale
Alphabetical Scale, A(best) – F (fail)
External/internal examiner
Evaluated by internal lecturer. External examiner shall be used periodically, next time 2018/2019.
Re-sit examination
Re-sit August 2016 fpr the Written examination. Project must be taken at the next regular liquidation of the course.
Mandatory work is valid one year after they are approved (for the upcoming re-sit and regular examination).
Examination support
None
Coursework Requirements
A total of 8 exercises is given, where 3 are mandatory. One of the exercises are assessed with character.
A project being assessed with character.
Teaching Materials
Introductory VHDL From Simulation to Synthesis - Sudhakar Yalamanchili - ISBN 0-13-080982-9
Computer Busses - W. Buchanan - ISBN 0-340-74076-0
Replacement course for
ELE3221 Programmerbare kretser